stm — functionality specific to STM32 MCUs
This module provides functionality specific to STM32 microcontrollers, including direct access to peripheral registers.
Memory access
The module exposes three subscriptable objects used for raw memory access.
Each behaves like a sparse array indexed by byte address: value = memN[addr]
reads, memN[addr] = value writes. The address is always a byte address,
regardless of the access width.
These memory objects can be used in combination with the peripheral register constants below to read and write MCU hardware peripheral registers, as well as any other location in the SoC’s address space.
- stm.mem8
Subscriptable 8-bit memory accessor.
mem8[addr]reads anintin the range 0-255 from the byte ataddr;mem8[addr] = valuewrites the low 8 bits ofvalue.addrmay be any byte-aligned address.
- stm.mem16
Subscriptable 16-bit (halfword) memory accessor.
mem16[addr]reads anintin the range 0-65535;mem16[addr] = valuewrites the low 16 bits.addrmust be aligned to 2 bytes.
- stm.mem32
Subscriptable 32-bit (word) memory accessor.
mem32[addr]reads anintin the range 0-0xFFFFFFFF;mem32[addr] = valuewrites the low 32 bits.addrmust be aligned to 4 bytes.
Peripheral register constants
The module defines constants for registers which are generated from CMSIS header files, and the constants available depend on the microcontroller series that is being compiled for. Examples of some constants include:
Constants that are named after a peripheral, like GPIOA, are the absolute
address of that peripheral. Constants that have a prefix which is the name of a
peripheral, like GPIO_BSRR, are relative offsets of the register. Accessing
peripheral registers requires adding the absolute base address of the peripheral
and the relative register offset. For example GPIOA + GPIO_BSRR is the
full, absolute address of the GPIOA->BSRR register.
Example use:
# set PA2 high
stm.mem32[stm.GPIOA + stm.GPIO_BSRR] = 1 << 2
# read PA3
value = (stm.mem32[stm.GPIOA + stm.GPIO_IDR] >> 3) & 1
Functions specific to STM32WBxx MCUs
These functions are available on STM32WBxx microcontrollers, and interact with the second CPU, the RF core.
- stm.rfcore_status() int
Returns the status of the second CPU as an integer (the first word of device info table).
Functions specific to STM32WLxx MCUs
These functions are available on STM32WLxx microcontrollers, and interact with the integrated “SUBGHZ” radio modem peripheral.
- stm.subghz_cs(level: bool) None
Sets the internal SPI CS pin attached to the radio peripheral. The
levelargument is active-low: a truthy value means “CS pin high” and de-asserts the signal, a falsey value means “CS pin low” and asserts the signal.The internal-only SPI bus corresponding to this CS signal can be instantiated using machine.SPI()
idvalue"SUBGHZ".
- stm.subghz_irq(handler: Callable[..., Any] | None) None
Sets the internal SUBGHZ radio interrupt handler to the provided function. The handler function is called as a “hard” interrupt in response to radio peripheral interrupts. See Writing interrupt handlers for more information about interrupt handlers in MicroPython.
Calling this function with the handler argument set to None disables the IRQ.
Due to a hardware limitation, each time this IRQ fires MicroPython disables it before calling the handler. In order to receive another interrupt, Python code should call
subghz_irq()to set the handler again. This has the side effect of re-enabling the IRQ.